The general method for troubleshooting divides in six steps. Eventually, a seventh step is added if relevant:
This method applies in every situation where an issue occurs. During the development of an analog IC, this can take place mainly during the design phase and during the validation phase. A design issue is generally a specification item that is not met. A validation issue is generally an unexpected difference between simulation and measurement.
This can seem obvious but defining accurately and without ambiguity a problem and specifying properly the conditions of occurrence if applicable is a difficult task that requires method and training. A powerful method is to answer the standard questions:
Very often, answering the initial list of questions brings additional questions.
This is probably the most difficult step in troubleshooting. Of course, possible root causes depend on the addressed issue. However, there are several standard cause classes:
The issue can be real on the circuit under evaluation or can result from the tools that are used for the evaluation. Tools depend on the phase in progress. They are simulators and models during the design phase, they are measurement instruments during prototypes validation. Tools must be questioned and checked to make sure that the issue is real. Using another simulator or another simulation technique, using another measurement instrument can help.
During design, design kit can be updated resulting in changes in the circuit behavior. The change does not necessarily result from a design change. However, normally the new design kit is supposed to be more accurate and the circuit must be change in order to work properly in the new environment.
During prototypes evaluation, some “oscillations” may not result from the circuit but from a cellphone or from another signal source in the surroundings.
A special subclass of environment items are parasitic elements. They should be considered during design and tools should take them into account but this is not always the case. In the lab, sockets parasitic elements can impact the circuit behavior.
The issue can result from the principle that has been used for designing the circuit. During design, this should normally occur only at early stages. It this occurs during validation, it indicates that something really went wrong in the development process.
The issue can result from a bad implementation of a good principle.
Issue can result from a component failure or from a design failure.
A difficult situation is when the issue does not result from a simple cause but from an interaction between two or more causes.
When one or more specification items are not met
In case something does not work as expected in the lab, either during verification or during characterization the designer must start a troubleshooting or debugging phase. Globally, the approach is based on the general seven steps problem solving method:
Of course, when applied to silicon debugging, the general method is adapted to the particular constraints of that field.
Each issue should be summarized in a sentence describing the undesired behavior and the conditions of occurrence.
One root cause has to be found for each issue. A single cause may be the root for several issues. The method for each issue is:
When two or three signatures comply with expectations from a given scenario, it is a good candidate. The investigations to find root cause may show additional issues. These should be considered as well but as separate issues that must be analyzed. Only careful analysis can define whether different issues are related to the same root cause. A complex problem should never be over-simplified.
Once a root cause is identified, it should be validated using all the possible tools and methods. Simulation is a powerful tool but some techniques such as FIB (Focused Ion Beam) allow in place circuit modifications by cutting wires and creating new connections.
Just like for design, the right solution is the best choice in a list. Depending on the context (metal fix or full re-spin), the list of possible solutions may vary. Usually, the more expensive the solution, the more powerful it is.
The solution must be validated extensively through simulation. A design change leads to a new design with ideally the expected effect on the problem. But the new design may also exhibit some undesired behavior or performance that could be worse than the original design!
Full silicon validation is required again to check that the original problem is fixed but also that the fix did not create a new issue nor it did break something that worked fine before.